Features & Benefits

• Comprehensive Set of Signal Integrity Tools that Allow You to Quickly Isolate, Identify, and Debug Complex Signal Integrity Issues
  • Glitch Trigger and Storage – Allows you to trigger on and highlight potential signal integrity problems. Not only can the TLA6000 Series trigger on the problem, but by highlighting suspected problems in red, you will be able to easily determine which signals you need to investigate further
  • iCapture – Route the suspected signal to the analog output of the TLA6000 using the exclusive Tektronix iCapture feature. This eliminates the need to double-probe with an oscilloscope probe, reducing time to debug
  • iView – Time-correlated view of both logic analyzer and oscilloscope data to trace the SI problem across the digital and analog domain
• Performance and Ease of Use to Debug, Validate, and Optimize Digital Systems
  • 125 ps Resolution MagniVu™ Acquisition to Accurately See Signal Relationships in Your System
  • State Speed – Sample your fastest synchronous buses with clock rates up to 800 MHz and data rates up to 1.25 Gb/s
  • 15 in. Display, with Optional Touch Screen to See More of Your Data and Navigate Efficiently through Your Data
  • 3 Models with 68/102/136 Channels and Up to 128 Mb Record Length offer Flexible Solutions to Fit Any Budget
  • Drag-and-Drop Triggering – Simply drag any one of eight different trigger types from a table onto the waveform and the TLA will automatically set up the trigger conditions. Eliminates errors, improves repeatability, and saves time
  • Drag-and-Drop Measurements – Simply drag an icon from the measurement toolbar and drop it on your signal of interest and get a table of results. Saves time, removes complexity, and reduces measurement uncertainty
• Analysis Tools for Debugging and Validating Today’s Digital Systems
  • FPGA
  • DDR2
  • A Broad Selection of Microprocessor and Bus Support
  • MIPI CSI and DSI Debug

Applications

• Digital Hardware Validation and Debug
• Monitoring, Measurement, and Optimization of Digital Hardware Performance
• Embedded Software Integration, Debug, and Verification

Efficiently Debug and Validate Your Digital System at a Price You Will Like!

The affordable TLA6000 Series of logic analyzers offer the performance needed to debug, validate, and optimize the functionality of your digital system. The TLA6000 Series also provides a comprehensive set of signal integrity debug tools that allow you quickly isolate, identify, and characterize elusive and hard-to-find problems. Add a broad range of support for today’s applications, and you have the ideal tool to help you meet all of the debug challenges of today’s digital designs.

The TLA6000 Series allows you to effectively validate and debug the functionality of your digital designs:

• Use the patented 8 GHz MagniVu technology to accurately measure timing relationships. The single, integrated acquisition architecture of the TLA6000 Series eliminates the timing skew problems inherent in other logic analyzer architectures
• Capture on buses with clock rates up to 800 MHz and data rates up to 1.25 Gb/s
• Buy the capability you need now and upgrade as your measurement needs grow
• Quickly isolate events through a simple and intuitive drag-and-drop trigger setup
• Easily summarize your design’s performance with sophisticated drag-and-drop measurements such as frequency, period, pulse width, duty cycle, and edge count
• View data in a variety of time-correlated formats including waveform, listing, graph, disassembly, source code, or compare

Find Tough Signal Integrity Problems

Today’s logic analyzers not only need to help troubleshoot functional issues in your design, but also need to help find signal integrity problems caused by crosstalk, termination mismatches, ground bounce, and other issues. To help debug these problems, the TLA6000 Series includes a comprehensive suite of signal debug tools.

These tools allow you to:

• Use glitch trigger to monitor selected signals in your design and trigger when a signal integrity problem is found on any one of these signals
• Automatically tag any found signal integrity problems, allowing you to quickly identify the signals of interest
• Gain more insight into the problem using the exclusive iCapture functionality to view both digital and analog data through a single probe
• Use iView to see time-correlated digital and analog displays of your data, letting you track the signal integrity problem across both analog and digital domains

DDR2 Protocol Debug and Validation

DDR2 memory systems are used in many of today’s embedded system designs – commonly implemented as a bus on the microprocessor or as a block in an FPGA. The complexity of the DDR2 protocol and the number of command/data/address signals make it difficult to both visualize the operation of the bus and to isolate any potential problems. In addition, designers need to ensure that signal timing and interfaces comply with JEDEC standards. The TLA6000 DDR2x8 and DDR2x16 options provide a complete, easy-to-use DDR2 test solution for embedded DDR2 designs up to DDR2-800 using x4, x8, and x16 data-width DDR2 devices.

These options consist of set of tools designed to provide visibility to all address, data, and control signals. The bundle includes:

Memory Chip Interposer.

Protocol Decode Software.

DDR Analysis.

• Memory chip interposers that provide a convenient way of probing embedded DDR memory systems and eliminates the need to design in probe access points. These memory chip interposers work with the unique iCapture™ Analog Mux feature of the TLA6000 to provide a single probing solution for both the logic analyzer and oscilloscope, saving time and minimizing setup complexity
• Protocol decode software that shows all of the DDR2 transactions as well as providing triggering on DDR2 events
• Sample-point analysis software that automates the process of correctly configuring the TLA6000 Series to accurately sample the DDR2 signals
• Protocol violation software that finds and reports violations of the JEDEC-defined DDR2 protocol

TLA6000 Selection Guide